I82371MX Datasheet, PDF (36/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)

82371MX (MPIIX)
E
Bit
Description
3:0
Interrupt Routing: When bit 7=0, this field selects the routing of the MIRQ to one of the interrupt
controller interrupt inputs.
Bits [3:0]
IRQ Routing
Bits [3:0]
IRQ Routing
0000
0001
0010
0011
0100
0101
0110
0111
Reserved
Reserved
Reserved
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
1000
1001
1010
1011
1100
1101
1110
1111
Reserved
IRQ9
IRQ10
IRQ11
IRQ12
Reserved
IRQ14
IRQ15
3.2.16. MDMARC[2:0]MOTHERBOARD DEVICE DMA ROUTE CONTROL REGISTERS
Address Offset :
Default Value:
Attribute:
76h (MDMARC0), 77h (MDMARC1),
78h (MDMARC2),
04h
R/W
These registers control the routing of the MDRQ[2:0] and MDAK[2:0]# signals to the DREQ and DACK# signals
on the 8237 DMA controllers.
When a MDRQ/MDAK# pair is programmed for DMA channel 2, then DREQ2/DACK2# pins are masked. If more
than one of the three Motherboard DMAs are used, the Motherboard DMAs should be programmed to different
compatible DMA channels. Programming more than one Motherboard DMA to the same compatible DMA
channel will result in unpredictable device operation.
Bit
Description
7
Type F and DMA Buffer Enable (FAST): 1=Enable for this channel. 0=Disable.
6:3
Reserved. Read as 0's.
2:0
DMA Channel select (CHNL): This field selects the DMA channel connected to the
MDRQ/MDAK# pair.
Bits[2:0] DMA channel
Bits[2:0] DMA channel
000
0
001
1
010
2
011
3
100
101
110
111
default (disabled)
5
6
7
36
PRELIMINARY