S912XEG384J3VA Datasheet, PDF (886/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
• Program ERPART to the EEE nonvolatile information register at global address 0x12_0004 (see
Table 24-7)
• Program a duplicate ERPART to the EEE nonvolatile information register at global address
0x12_0006 (see Table 24-7)
The D-Flash user partition will start at global address 0x10_0000. The buffer RAM EEE partition will end
at global address 0x13_FFFF. After the Partition D-Flash operation has completed, the CCIF flag will set.
Running the Partition D-Flash command a second time will result in the ACCERR bit within the FSTAT
register being set. The data value written corresponds to the number of 256 byte sectors allocated for either
direct D-Flash access (DFPART) or buffer RAM EEE access (ERPART).
Table 24-76. Partition D-Flash Command Error Handling
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 010 at command launch
FSTAT
ACCERR
Set if command not available in current mode (see Table 24-30)
Set if partitions have already been defined
Set if an invalid DFPART or ERPART selection is supplied⁽¹⁾
FPVIOL None
MGSTAT1 Set if any errors have been encountered during the read
MGSTAT0 Set if any non-correctable errors have been encountered during the read
FERSTAT
EPVIOLIF None
1. As defined by the maximum ERPART for FTM256K2.
MC9S12XE-Family Reference Manual Rev. 1.25
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