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| S912XEG384J3VA Datasheet, PDF (1283/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family | |||
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Appendix E Detailed Register Address Map
0x00C8â0x00CF Asynchronous Serial Interface (SCI0) Map
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0x00C8
0x00C9
0x00CA
0x00C8
0x00C9
SCI0BDH(1)
SCI0BDL1
SCI0CR11
SCI0ASR1(2)
SCI0ACR12
R
IREN
W
R
SBR7
W
R
LOOPS
W
R
RXEDGIF
W
R
RXEDGIE
W
TNP1
SBR6
SCISWAI
0
0
TNP0
SBR5
RSRC
0
0
SBR12
SBR4
M
0
0
SBR11
SBR3
WAKE
0
0
0x00CA SCI0ACR22 R
0
0
0
0
0
W
R
0x00CB SCI0CR2
TIE
TCIE
RIE
ILIE
TE
W
R TDRE
TC
RDRF
IDLE
OR
0x00CC SCI0SR1
W
R
0
0x00CD SCI0SR2
AMAP
W
0
TXPOL RXPOL
R R8
0
0
0
0x00CE SCI0DRH
T8
W
R R7
R6
R5
R4
R3
0x00CF SCI0DRL
W T7
T6
T5
T4
T3
1. Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to one
Bit 2
SBR10
Bit 1
SBR9
SBR2
SBR1
ILT
PE
BERRV
0
BERRIF
BERRIE
BERRM1 BERRM0
RE
RWU
NF
FE
BRK13
0
TXDIR
0
R2
R1
T2
T1
Bit 0
SBR8
SBR0
PT
BKDIF
BKDIE
BKDFE
SBK
PF
RAF
0
R0
T0
0x00D0â0x00D7 Asynchronous Serial Interface (SCI1) Map
Address Name
Bit 7
Bit 6
0x00D0
0x00D1
0x00D2
0x00D0
0x00D1
0x00D2
0x00D3
0x00D4
SCI1BDH(1)
SCI1BDL1
SCI1CR11
SCI1ASR1(2)
SCI1ACR12
SCI1ACR22
SCI1CR2
SCI1SR1
R
IREN
W
R
SBR7
W
R
LOOPS
W
R
RXEDGIF
W
R
RXEDGIE
W
R
0
W
R
TIE
W
R TDRE
W
TNP1
SBR6
SCISWAI
0
0
0
TCIE
TC
Bit 5
TNP0
SBR5
RSRC
0
0
0
RIE
RDRF
Bit 4
SBR12
SBR4
M
0
0
0
ILIE
IDLE
Bit 3
SBR11
Bit 2
SBR10
Bit 1
SBR9
Bit 0
SBR8
SBR3
SBR2
SBR1
SBR0
WAKE
0
0
0
ILT
PE
BERRV
0
BERRIF
BERRIE
BERRM1 BERRM0
PT
BKDIF
BKDIE
BKDFE
TE
RE
RWU
SBK
OR
NF
FE
PF
Freescale Semiconductor
MC9S12XE-Family Reference Manual Rev. 1.25
1283
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