S912XEG384J3VA Datasheet, PDF (1291/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Appendix E Detailed Register Address Map
0x0138–0x013F Asynchronous Serial Interface (SCI5) Map (continued)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
R
0
0x013D SCI5SR2
AMAP
W
0
TXPOL RXPOL
R R8
0
0
0
0x013E SCI5DRH
T8
W
R R7
R6
R5
R4
R3
0x013F SCI5DRL
W T7
T6
T5
T4
T3
1. Those registers are accessible if the AMAP bit in the SCI5SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI5SR2 register is set to one
Bit 2
BRK13
0
R2
T2
Bit 1
TXDIR
0
R1
T1
Bit 0
RAF
0
R0
T0
0x0140–0x017F MSCAN (CAN0) Map
Address Name
Bit 7
R
0x0140 CAN0CTL0
RXFRM
W
R
0x0141 CAN0CTL1
CANE
W
R
0x0142 CAN0BTR0
SJW1
W
R
0x0143 CAN0BTR1
SAMP
W
R
0x0144 CAN0RFLG
WUPIF
W
R
0x0145 CAN0RIER
WUPIE
W
R
0
0x0146 CAN0TFLG
W
R
0
0x0147 CAN0TIER
W
R
0
0x0148 CAN0TARQ
W
R
0
0x0149 CAN0TAAK
W
R
0
0x014A CAN0TBSEL
W
R
0
0x014B CAN0IDAC
W
R
0
0x014C Reserved
W
R
0
0x014D CAN0MISC
W
R RXERR7
0x014E CAN0RXERR
W
R TXERR7
0x014F CAN0TXERR
W
0x0150– CAN0IDAR0– R
0x0153 CAN0IDAR3 W
AC7
Bit 6
RXACT
CLKSRC
SJW0
TSEG22
CSCIF
CSCIE
0
0
0
0
0
0
0
0
RXERR6
TXERR6
AC6
Bit 5
CSWAI
Bit 4
SYNCH
LOOPB LISTEN
BRP5
BRP4
TSEG21 TSEG20
RSTAT1 RSTAT0
RSTATE1 RSTATE0
0
0
0
0
0
0
0
0
0
0
IDAM1
0
IDAM0
0
0
0
RXERR5 RXERR4
TXERR5 TXERR4
AC5
AC4
Bit 3
TIME
BORM
BRP3
TSEG13
TSTAT1
TSTATE1
0
0
0
0
0
0
0
0
RXERR3
TXERR3
AC3
Bit 2
WUPE
WUPM
BRP2
TSEG12
TSTAT0
TSTATE0
TXE2
TXEIE2
ABTRQ2
ABTAK2
TX2
IDHIT2
0
0
RXERR2
TXERR2
AC2
Bit 1
SLPRQ
SLPAK
BRP1
TSEG11
OVRIF
OVRIE
TXE1
TXEIE1
ABTRQ1
ABTAK1
TX1
IDHIT1
0
0
RXERR1
TXERR1
AC1
Bit 0
INITRQ
INITAK
BRP0
TSEG10
RXF
RXFIE
TXE0
TXEIE0
ABTRQ0
ABTAK0
TX0
IDHIT0
0
BOHOLD
RXERR0
TXERR0
AC0
Freescale Semiconductor
MC9S12XE-Family Reference Manual Rev. 1.25
1291