S912XEG384J3VA Datasheet, PDF (114/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.12 Port E Data Direction Register (DDRE)
Address 0x0009 (PRR)
Access: User read/write⁽¹⁾
7
6
5
4
3
2
1
0
R
0
0
DDRE7
DDRE6
DDRE5
DDRE4
DDRE3
DDRE2
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-10. Port E Data Direction Register (DDRE)
1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
Table 2-13. DDRE Register Field Descriptions
Field
7-2
DDRE
1-0
Description
Port E Data Direction—
This register controls the data direction of pins 7 through 2.
The external bus function controls the data direction for the associated pins. In this case the data direction bits will
not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input
or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
Reserved—
Port E bit 1 (associated with IRQ) and bit 0 (associated with XIRQ) cannot be configured as outputs. Port E, bits 1
and 0, can be read regardless of whether the alternate interrupt function is enabled.
2.3.13 S12X_EBI ports, BKGD pin Pull-up Control Register (PUCR)
Address 0x000C (PRR)
Access: User read/write⁽¹⁾
7
6
5
4
3
2
1
R
0
PUPKE
BKPUE
PUPEE
PUPDE
PUPCE
PUPBE
W
Reset
1
1
0
1
0
0
0
= Unimplemented or Reserved
Figure 2-11. S12X_EBI ports, BKGD pin Pull-up Control Register (PUCR)
1. Read:Anytime in single-chip modes.
Write:Anytime, except BKPUE which is writable in Special Test Mode only.
0
PUPAE
0
MC9S12XE-Family Reference Manual Rev. 1.25
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