S912XEG384J3VA Datasheet, PDF (163/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

2.3.83
Chapter 2 Port Integration Module (S12XEPIMV1)
Port AD1 Pull Up Enable Register 0 (PER0AD1)
Address 0x027E
Access: User read/write⁽¹⁾
7
R
PER0AD17
W
6
PER0AD16
5
PER0AD15
4
PER0AD14
3
PER0AD13
2
PER0AD12
1
PER0AD11
0
PER0AD10
Reset
0
0
0
0
0
0
0
0
1. Read: Anytime.
Write: Anytime.
Figure 2-81. Port AD1 Pull Device Up Register 0 (PER0AD1)
Table 2-79. PER0AD1 Register Field Descriptions
Field
Description
7-0 Port AD1 pull device enable—Enable pull devices on input pins
PER0AD1 These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
2.3.84 Port AD1 Pull Up Enable Register 1 (PER1AD1)
Address 0x027F
Access: User read/write⁽¹⁾
7
R
PER1AD17
W
6
PER1AD16
5
PER1AD15
4
PER1AD14
3
PER1AD13
2
PER1AD12
1
PER1AD11
0
PER1AD10
Reset
0
0
0
0
0
0
0
0
1. Read: Anytime.
Write: Anytime.
Figure 2-82. Port AD1 Pull Up Enable Register 1 (PER1AD1)
Table 2-80. PER1AD1 Register Field Descriptions
Field
Description
7-0 Port AD1 pull device enable—Enable pull devices on input pins
PER1AD1 These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
163