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| S912XEG384J3VA Datasheet, PDF (216/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family | |||
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Chapter 3 Memory Mapping Control (S12XMMCV4)
3.4.2.5.1 System XSRAM
System XSRAM has two ways to be accessed by the CPU. One is by the programming of RPAGE and the
ï¬xed XSRAM areas conï¬gured by the values of ROMHM, RAMHM, or by the usage of the global
instruction and the usage of GPAGE.
Figure 3-22 shows the memory map for the implemented XSRAM. The size of the implemented XSRAM
is done by the device deï¬nition and denoted by RAMSIZE.
RAM Area in the Memory Map
0x00_0000
0x00_07FF
REG. Area
RAM Area
ROMHM = 1 RAMHM = 0
ROMHM = 0 RAMHM = X
0x00_0800
Unimplemented
RAM
ROMHM = 1 RAMHM = 1
0x00_0800
Unimplemented
RAM
0x0F_FFFF
EEPROM Area
0x13_FFFF
External
Space Area
0x3F_FFFF
0x0F_E000
0x0F_FFFF
8K RAM
0x0F_A000
0x0F_C000
0x0F_FFFF
8K RAM
16K RAM
FLASH Area
0x7F_FFFF
Figure 3-22. S12XE System RAM in the Memory Map
MC9S12XE-Family Reference Manual Rev. 1.25
216
Freescale Semiconductor
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