S912XEG384J3VA Datasheet, PDF(67/1324 Page) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

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S912XEG384J3VA Datasheet, PDF (67/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

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Chapter 1 Device Overview MC9S12XE-Family

1.2.3.35 PJ5 / KWJ5 / SCL1 / CS2 â PORT J I/O Pin 5

PJ5 is a general-purpose input or output pin. It can be conï¬gured as a keypad wakeup input. It can be

conï¬gured as the serial clock pin SCL of the IIC1 module. It can be also conï¬gured as chip-select output 2.

1.2.3.36 PJ4 / KWJ4 / SDA1 / CS0 â PORT J I/O Pin 4

PJ4 is a general-purpose input or output pin. It can be conï¬gured as a keypad wakeup input. It can be

conï¬gured as the serial data pin SDA of the IIC1 module. It can also be conï¬gured as chip-select output.

1.2.3.37 PJ3 / KWJ3 â PORT J I/O Pin 3

PJ3 is a general-purpose input or output pins. It can be conï¬gured as a keypad wakeup input.

1.2.3.38 PJ2 / KWJ2 / CS1 â PORT J I/O Pin 2

PJ2 is a general-purpose input or output pins. It can be conï¬gured as a keypad wakeup input. It can also

be conï¬gured as chip-select output.

1.2.3.39 PJ1 / KWJ1 / TXD2 â PORT J I/O Pin 1

PJ1 is a general-purpose input or output pin. It can be conï¬gured as a keypad wakeup input. It can be

conï¬gured as the transmit pin TXD of the serial communication interface 2 (SCI2).

1.2.3.40 PJ0 / KWJ0 / RXD2 / CS3 â PORT J I/O Pin 0

PJ0 is a general-purpose input or output pin. It can be conï¬gured as a keypad wakeup input. It can be

conï¬gured as the receive pin RXD of the serial communication interface 2 (SCI2).It can also be conï¬gured

as chip-select output 3.

1.2.3.41 PK7 / EWAIT / ROMCTL â Port K I/O Pin 7

PK7 is a general-purpose input or output pin. During MCU emulation modes and normal expanded modes

of operation, this pin is used to enable the Flash EEPROM memory in the memory map (ROMCTL). At

the rising edge of RESET, the state of this pin is latched to the ROMON bit. The EWAIT input signal

maintains the external bus access until the external device is ready to capture data (write) or provide data

(read).

The input voltage threshold for PK7 can be conï¬gured to reduced levels, to allow data from an external

3.3-V peripheral to be read by the MCU operating at 5.0 V.

1.2.3.42 PK[6:4] / ADDR[22:20] / ACC[2:0] â Port K I/O Pin [6:4]

PK[6:4] are general-purpose input or output pins. During MCU expanded modes of operation, the

ACC[2:0] signals are used to indicate the access source of the bus cycle. These pins also provide the

expanded addresses ADDR[22:20] for the external bus. In Emulation modes ACC[2:0] is available and is

time multiplexed with the high addresses

MC9S12XE-Family Reference Manual Rev. 1.25

Freescale Semiconductor

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