S912XEG384J3VA Datasheet, PDF (761/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 21
Serial Peripheral Interface (S12SPIV5)
Table 21-1. Revision History
Revision
Number
V05.00
Revision Date
24 Mar 2005
Sections
Affected
21.3.2/21-765
Description of Changes
- Added 16-bit transfer width feature.
21.1 Introduction
The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral
devices. Software can poll the SPI status flags or the SPI operation can be interrupt driven.
21.1.1
Glossary of Terms
SPI
SS
SCK
MOSI
MISO
MOMI
SISO
Serial Peripheral Interface
Slave Select
Serial Clock
Master Output, Slave Input
Master Input, Slave Output
Master Output, Master Input
Slave Input, Slave Output
21.1.2 Features
The SPI includes these distinctive features:
• Master mode and slave mode
• Selectable 8 or 16-bit transfer width
• Bidirectional mode
• Slave select output
• Mode fault error flag with CPU interrupt capability
• Double-buffered data register
• Serial clock with programmable polarity and phase
• Control of SPI operation during wait mode
21.1.3 Modes of Operation
The SPI functions in three modes: run, wait, and stop.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
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