S912XEG384J3VA Datasheet, PDF (442/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 10 XGATE (S12XGATEV3)
ORL
Logical OR Immediate 8 bit Constant
(Low Byte)
ORL
Operation
RD.L | IMM8 ⇒ RD.L
Performs a bit wise logical OR between the low byte of register RD and an immediate 8 bit constant and
stores the result in the destination register RD.L. The high byte of RD is not affected.
CCR Effects
NZVC
∆ ∆ 0—
N: Set if bit 7 of the result is set; cleared otherwise.
Z: Set if the 8 bit result is $00; cleared otherwise.
V: 0; cleared.
C: Not affected.
Code and CPU Cycles
Source Form
ORL RD, #IMM8
Address
Mode
IMM8
10100
Machine Code
RD
IMM8
Cycles
P
MC9S12XE-Family Reference Manual Rev. 1.25
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