S912XEG384J3VA Datasheet, PDF (177/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.106 Port F Polarity Select Register (PPSF)
Address 0x037D
R
W
Reset
7
PPSF7
0
1. Read: Anytime.
Write: Anytime.
6
PPSF6
5
PPSF5
4
PPSF4
3
PPSF3
2
PPSF2
0
0
0
0
0
Figure 2-104. Port F Polarity Select Register (PPSF)
Access: User read/write⁽¹⁾
1
0
PPSF1
PPSF0
0
0
Table 2-101. PPSF Register Field Descriptions
Field
7-0
PPSF
Description
Port F pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
2.3.107 PIM Reserved Register
Address 0x037E
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
1. Read: Always reads 0x00
Write: Unimplemented
Figure 2-105. PIM Reserved Register
Access: User read⁽¹⁾
1
0
0
0
0
0
2.3.108 Port F Routing Register (PTFRR)
Address 0x037F
7
R
0
W
Reset
0
1. Read: Anytime.
Write: Anytime.
6
5
4
3
2
0
PTFRR5
PTFRR4
PTFRR3
PTFRR2
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-106. Port F Routing Register (PTFRR)
Access: User read/write⁽¹⁾
1
0
PTFRR1
PTFRR0
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
177