S912XEG384J3VA Datasheet, PDF (1282/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Appendix E Detailed Register Address Map
0x00C0–0x00C7 Asynchronous Serial Interface (SCI3) Map
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0x00C0
0x00C1
0x00C2
0x00C0
SCI3BDH⁽¹⁾
SCI3BDL¹
SCI3CR1¹
SCI3ASR1⁽²⁾
R
IREN
W
R
SBR7
W
R
LOOPS
W
R
RXEDGIF
W
TNP1
SBR6
SCISWAI
0
TNP0
SBR5
RSRC
0
SBR12
SBR4
M
0
SBR11
SBR3
WAKE
0
0x00C1
SCI3ACR1²
R
RXEDGIE
0
0
0
0
W
0x00C2 SCI3ACR2^{2 R}
0
0
0
0
0
W
R
0x00C3 SCI3CR2
TIE
TCIE
RIE
ILIE
TE
W
R TDRE
TC
RDRF
IDLE
OR
0x00C4 SCI3SR1
W
R
0
0x00C5 SCI3SR2
AMAP
W
0
TXPOL RXPOL
R R8
0
0
0
0x00C6 SCI3DRH
T8
W
R R7
R6
R5
R4
R3
0x00C7 SCI3DRL
W T7
T6
T5
T4
T3
1. Those registers are accessible if the AMAP bit in the SCI3SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI3SR2 register is set to one
Bit 2
SBR10
Bit 1
SBR9
SBR2
SBR1
ILT
PE
BERRV
0
BERRIF
BERRIE
BERRM1 BERRM0
RE
RWU
NF
FE
BRK13
0
R2
T2
TXDIR
0
R1
T1
Bit 0
SBR8
SBR0
PT
BKDIF
BKDIE
BKDFE
SBK
PF
RAF
0
R0
T0
1282
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor