S912XEG384J3VA Datasheet, PDF (538/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
Module Base + 0x0005
R
W
Reset
7
TCNT7
0
6
TCNT6
5
TCNT5
4
TCNT4
3
TCNT3
2
TCNT2
0
0
0
0
0
Figure 14-8. Timer Count Register Low (TCNT)
Read: Anytime
Write: Writable in special modes.
All bits reset to zero.
1
TCNT1
0
0
TCNT0
0
Table 14-6. TCNT Field Descriptions
Field
Description
15:0
TCNT[15:0]
Timer Counter Bits — The 16-bit main timer is an up counter. A read to this register will return the current value
of the counter. Access to the counter register will take place in one clock cycle.
Note: A separate read/write for high byte and low byte in test mode will give a different result than accessing
them as a word. The period of the first count after a write to the TCNT registers may be a different size
because the write is not synchronized with the prescaler clock.
14.3.2.6 Timer System Control Register 1 (TSCR1)
Module Base + 0x0006
7
6
5
4
3
2
1
0
R
0
0
0
TEN
TSWAI
TSFRZ
TFFCA
PRNT
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-9. Timer System Control Register 1 (TSCR1)
Read or write: Anytime except PRNT bit is write once
All bits reset to zero.
Table 14-7. TSCR1 Field Descriptions
Field
7
TEN
6
TSWAI
Description
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
Note: If for any reason the timer is not active, there is no ÷64 clock for the pulse accumulator since the ÷64 is
generated by the timer prescaler.
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer counter, pulse accumulators and modulus down counter when the MCU is in wait mode.
Timer interrupts cannot be used to get the MCU out of wait.
MC9S12XE-Family Reference Manual Rev. 1.25
538
Freescale Semiconductor