S912XEG384J3VA Datasheet, PDF (401/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

BFFO
Bit Field Find First One
Chapter 10 XGATE (S12XGATEV3)
BFFO
Operation
FirstOne(RS) ⇒ RD;
Searches the first “1” in register RS (from MSB to LSB) and writes the bit position into the destination
register RD. The upper bits of RD are cleared. In case the content of RS is equal to $0000, RD will be
cleared and the carry flag will be set. This is used to distinguish a “1” in position 0 versus no “1” in the
whole RS register at all.
CCR Effects
NZVC
0∆0∆
N: 0; cleared.
Z: Set if the result is $0000; cleared otherwise.
V: 0; cleared.
C: Set if RS = $0000⁽¹⁾; cleared otherwise.
1. Before executing the instruction
Code and CPU Cycles
Source Form
BFFO RD, RS
Address
Mode
DYA
00001
Machine Code
RD
RS
Cycles
10000
P
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
401