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S912XEG384J3VA Datasheet, PDF (363/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family
Chapter 10 XGATE (S12XGATEV3)
this register to a channel priority level (non-zero value) selects the corresponding Initial Stack Pointer
Registers XGISP74 or XGISP31 (see Table 10-6).
Module Base +0x0005
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
XGISPSEL[1:0]
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-6. XGATE Initial Stack Pointer Select Register (XGISPSEL)
Read: Anytime
Write: Anytime
Table 10-5. XGISPSEL Field Descriptions
Field
Description
1-0
Register select— Determines whether XGISP74, XGISP31, or XGVBR is mapped to “Module Base +0x0006”.
XGISPSEL[1:0] See Table 10-6.
Table 10-6. XGISP74, XGISP31, XGVBR Mapping
XGISPSEL[1:0]
3
2
1
0
Register Mapped to “Module Base +0x0006“
Reserved
XGISP74
XGISP31
XGVBR
10.3.1.5 XGATE Initial Stack Pointer for Interrupt Priorities 7 to 4 (XGISP74)
The XGISP74 register is intended to point to the stack region that is used by XGATE channels of priority
7 to 4. Every time a thread of such priority is started, RISC core register R7 will be initialized with the
content of XGISP74.
Module Base +0x0006
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
XGISP74[15:1]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-7. XGATE Initial Stack Pointer for Interrupt Priorities 7 to 4 (XGISP74)
Read: Anytime
Write: Only if XGATE requests are disabled (XGE = 0) and idle (XGCHID = $00))
MC9S12XE-Family Reference Manual Rev. 1.25
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