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S912XEG384J3VA Datasheet, PDF (833/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
Command Write Sequence — An MCU instruction sequence to execute built-in algorithms (including
program and erase) on the Flash memory.
D-Flash Memory — The D-Flash memory constitutes the nonvolatile memory store required for EEE.
Memory space in the D-Flash memory not required for EEE can be partitioned to provide nonvolatile
memory space for applications.
D-Flash Sector — The D-Flash sector is the smallest portion of the D-Flash memory that can be erased.
The D-Flash sector consists of four 64 byte rows for a total of 256 bytes.
EEE (Emulated EEPROM) — A method to emulate the small sector size features and endurance
characteristics associated with an EEPROM.
EEE IFR — Nonvolatile information register located in the D-Flash block that contains data required to
partition the D-Flash memory and buffer RAM for EEE. The EEE IFR is visible in the global memory map
by setting the EEEIFRON bit in the MMCCTL1 register.
NVM Command Mode — An NVM mode using the CPU to setup the FCCOB register to pass parameters
required for Flash command execution.
Phrase — An aligned group of four 16-bit words within the P-Flash memory. Each phrase includes eight
ECC bits for single bit fault correction and double bit fault detection within the phrase.
P-Flash Memory — The P-Flash memory constitutes the main nonvolatile memory store for applications.
P-Flash Sector — The P-Flash sector is the smallest portion of the P-Flash memory that can be erased.
Each P-Flash sector contains 1024 bytes.
Program IFR — Nonvolatile information register located in the P-Flash block that contains the Device
ID, Version ID, and the Program Once field. The Program IFR is visible in the global memory map by
setting the PGMIFRON bit in the MMCCTL1 register.
24.1.2 Features
24.1.2.1 P-Flash Features
• 128 Kbytes of P-Flash memory composed of two 64 Kbyte Flash blocks. The 64 Kbyte Flash
blocks are each divided into 64 sectors of 1024 bytes.
• Single bit fault correction and double bit fault detection within a 64-bit phrase during read
operations
• Automated program and erase algorithm with verify and generation of ECC parity bits
• Fast sector erase and phrase program operation
• Ability to program up to one phrase in each P-Flash block simultaneously
• Flexible protection scheme to prevent accidental program or erase of P-Flash memory
24.1.2.2 D-Flash Features
• Up to 32 Kbytes of D-Flash memory with 256 byte sectors for user access
• Dedicated commands to control access to the D-Flash memory over EEE operation
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
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