S912XEG384J3VA Datasheet, PDF (121/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 2 Port Integration Module (S12XEPIMV1)
Table 2-19. DDRK Register Field Descriptions
Field
7-0
DDRK
Description
Port K Data Direction—
This register controls the data direction of pins 7 through 0.
The external bus function controls the data direction for the associated pins. In this case the data direction bits will
not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input
or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
2.3.21 Port T Data Register (PTT)
Address 0x0240
R
W
Altern.
Function
Reset
7
PTT7
IOC7
—
0
1. Read: Anytime.
Write: Anytime.
6
PTT6
5
PTT5
4
PTT4
3
PTT3
2
PTT2
IOC6
—
0
IOC5
IOC4
IOC3
IOC2
VREG_API
—
—
—
0
0
0
0
Figure 2-19. Port T Data Register (PTT)
Access: User read/write⁽¹⁾
1
0
PTT1
PTT0
IOC1
—
0
IOC0
—
0
Field
7-6
PTT
5
PTT
4-0
PTT
Table 2-20. PTT Register Field Descriptions
Description
Port T general purpose input/output data—Data Register
Port T pins 7 through 0 are associated with ECT channels IOC7 and IOC6.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port T general purpose input/output data—Data Register
Port T pins 5 is associated with ECT channel IOC5 and the VREG_API output.
The ECT function takes precedence over the VREG_API and the general purpose I/O function if the related channel
is enabled.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port T general purpose input/output data—Data Register
Port T pins 4 through 0 are associated with ECT channels IOC4 through IOC0.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
121