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S912XEG384J3VA Datasheet, PDF (660/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family
Chapter 17 Periodic Interrupt Timer (S12PIT24B8CV2)
• Run mode
This is the basic mode of operation.
• Wait mode
PIT operation in wait mode is controlled by the PITSWAI bit located in the PITCFLMT register.
In wait mode, if the bus clock is globally enabled and if the PITSWAI bit is clear, the PIT operates
like in run mode. In wait mode, if the PITSWAI bit is set, the PIT module is stalled.
• Stop mode
In full stop mode or pseudo stop mode, the PIT module is stalled.
• Freeze mode
PIT operation in freeze mode is controlled by the PITFRZ bit located in the PITCFLMT register.
In freeze mode, if the PITFRZ bit is clear, the PIT operates like in run mode. In freeze mode, if the
PITFRZ bit is set, the PIT module is stalled.
17.1.4 Block Diagram
Figure 17-1 shows a block diagram of the PIT module.
Bus Clock
8-Bit
Micro Timer 0
Micro Time
Base 0
16-Bit Timer 0
8-Bit
Micro Timer 1
Micro
Time
Base 1
16-Bit Timer 1
16-Bit Timer 2
Time-Out 0
Time-Out 1
Time-Out 2
Interrupt 0
Interface Trigger 0
Interrupt 1
Interface Trigger 1
Interrupt 2
Interface Trigger 2
16-Bit Timer 3
Time-Out 3
Interrupt 3
Interface Trigger 3
16-Bit Timer 4
Time-Out 4
Interrupt 4
Interface Trigger 4
16-Bit Timer 5
Time-Out 5
Interrupt 5
Interface Trigger 5
16-Bit Timer 6
Time-Out 6
Interrupt 6
Interface Trigger 6
16-Bit Timer 7
Time-Out 7
Interrupt 7
Interface Trigger 7
Figure 17-1. PIT24B8C Block Diagram
17.2 External Signal Description
The PIT module has no external pins.
MC9S12XE-Family Reference Manual Rev. 1.25
660
Freescale Semiconductor