S912XEG384J3VA Datasheet, PDF (1271/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Appendix E Detailed Register Address Map
Appendix E
Detailed Register Address Map
The following tables show the detailed register map of the S12XE-Family.
NOTE
Smaller derivatives within the S12XE-Family feature a subset of the listed
modules. Refer to Appendix D Derivative Differences for more information
about derivative device module subsets.
0x0000–0x0009 Port Integration Module (PIM) Map 1 of 6
Address
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
Name
PORTA
PORTB
DDRA
DDRB
PORTC
PORTD
DDRC
DDRD
PORTE
DDRE
Bit 7
R
PA7
W
R
PB7
W
R
DDRA7
W
R
DDRB7
W
R
PC7
W
R
PD7
W
R
DDRC7
W
R
DDRD7
W
R
PE7
W
R
DDRE7
W
Bit 6
PA6
PB6
DDRA6
DDRB6
PC6
PD6
DDRC6
DDRD6
PE6
DDRE6
Bit 5
PA5
PB5
DDRA5
DDRB5
PC5
PD5
DDRC5
DDRD5
PE5
DDRE5
Bit 4
PA4
PB4
DDRA4
DDRB4
PC4
PD4
DDRC4
DDRD4
PE4
DDRE4
Bit 3
PA3
PB3
DDRA3
DDRB3
PC3
PD3
DDRC3
DDRD3
PE3
DDRE3
Bit 2
PA2
PB2
DDRA2
DDRB2
PC2
PD2
DDRC2
DDRD2
PE2
DDRE2
Bit 1
PA1
PB1
DDRA1
DDRB1
PC1
PD1
DDRC1
DDRD1
PE1
0
0x000A–0x000B Module Mapping Control (S12XMMC) Map 1 of 2
Address
0x000A
0x000B
Name
MMCCTL0
MODE
Bit 7
R
CS3E1
W
R
MODC
W
Bit 6
CS2E1
MODB
Bit 5
CS1E1
MODA
Bit 4
CS0E1
0
Bit 3
CS3E0
0
Bit 2
CS2E0
0
Bit 1
CS1E0
0
Bit 0
PA 0
PB0
DDRA0
DDRB0
PC0
PD0
DDRC0
DDRD0
PE0
0
Bit 0
CS0E0
0
0x000C–0x000D Port Integration Module (PIM) Map 2 of 6
Address
0x000C
0x000D
Name
PUCR
RDRIV
Bit 7
R
PUPKE
W
R
RDPK
W
Bit 6
BKPUE
0
Bit 5
0
0
Bit 4
PUPEE
Bit 3
PUPDE
Bit 2
PUPCE
Bit 1
PUPBE
Bit 0
PUPAE
RDPE
RDPD
RDPC
RDPB
RDPA
Freescale Semiconductor
MC9S12XE-Family Reference Manual Rev. 1.25
1271