S912XEG384J3VA Datasheet, PDF (485/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Write: Only in special modes
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
11.3.2.12 S12XECRG COP Timer Arm/Reset Register (ARMCOP)
This register is used to restart the COP time-out period.
Module Base + 0x000B
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
0
0
0
0
0
0
0
0
Figure 11-14. S12XECRG ARMCOP Register Diagram
Read: Always reads $00
Write: Anytime
When the COP is disabled (CR[2:0] = “000”) writing to this register has no effect.
When the COP is enabled by setting CR[2:0] nonzero, the following applies:
Writing any value other than $55 or $AA causes a COP reset. To restart the COP time-out period
you must write $55 followed by a write of $AA. Other instructions may be executed between these
writes but the sequence ($55, $AA) must be completed prior to COP end of time-out period to
avoid a COP reset. Sequences of $55 writes or sequences of $AA writes are allowed. When the
WCOP bit is set, $55 and $AA writes must be done in the last 25% of the selected time-out period;
writing any value in the first 75% of the selected period will cause a COP reset.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
485