S912XEG384J3VA Datasheet, PDF(384/1324 Page) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

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S912XEG384J3VA Datasheet, PDF (384/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

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Chapter 10 XGATE (S12XGATEV3)

10.8.1.8 Dyadic Addressing (DYA)

In this mode the result of an operation between two registers is stored in one of the registers used as

operands.

RD = RD â RS is the general register to register format, with register RD being the ï¬rst operand and RS

the second. RD and RS can be any of the 8 general purpose registers R0 â¦ R7. If R0 is used as the

destination register, only the condition code ï¬ags are updated. This addressing mode is used only for shift

operations with a variable shift value

Examples:

LSL

R4,R5 ; R4 = R4 << R5

LSR

R4,R5 ; R4 = R4 >> R5

10.8.1.9 Triadic Addressing (TRI)

In this mode the result of an operation between two or three registers is stored into a third one.

RD = RS1 â RS2 is the general format used in the order RD, RS1, RS1. RD, RS1, RS2 can be any of the

8 general purpose registers R0 â¦ R7. If R0 is used as the destination register RD, only the condition code

ï¬ags are updated. This addressing mode is used for all arithmetic and logical operations.

Examples:

ADC

R5,R6,R7

SUB

R5,R6,R7

; R5 = R6 + R7 + Carry

; R5 = R6 - R7

10.8.1.10 Relative Addressing 9-Bit Wide (REL9)

A 9-bit signed word address offset is included in the instruction word. This addressing mode is used for

conditional branch instructions.

Examples:

BCC

REL9

BEQ

REL9

; PC = PC + 2 + (REL9 << 1)

; PC = PC + 2 + (REL9 << 1)

10.8.1.11 Relative Addressing 10-Bit Wide (REL10)

An 10-bit signed word address offset is included in the instruction word. This addressing mode is used for

the unconditional branch instruction.

Examples:

BRA

REL10

; PC = PC + 2 + (REL10 << 1)

10.8.1.12 Index Register plus Immediate Offset (IDO5)

(RS, #OFFS5) provides an unsigned offset from the base register.

Examples:

LDB

STW

R4,(R1,#OFFS5)

R4,(R1,#OFFS5)

; loads a byte from (R1+OFFS5) into R4

; stores R4 as a word to (R1+OFFS5)

MC9S12XE-Family Reference Manual Rev. 1.25

384

Freescale Semiconductor

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