S912XEG384J3VA Datasheet, PDF(58/1324 Page) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

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S912XEG384J3VA Datasheet, PDF (58/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

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Chapter 1 Device Overview MC9S12XE-Family

Table 1-10. Signal Properties Summary (Sheet 1 of 4)

Pin

Name

Function 1

Pin

Name

Function 2

Pin

Name

Function 3

Pin

Name

Function 4

Pin

Name

Function 5

Power

Supply

Internal Pull

Resistor

CTRL

Reset

State

Description

EXTAL

â

â

â

â

VDDPLL

NA

NA Oscillator pins

XTAL

â

â

â

â

VDDPLL

NA

NA

RESET

â

â

â

â

VDDX

PULLUP

External reset

TEST

â

â

â

â

N.A. RESET pin DOWN Test input

BKGD

MODC

â

â

â

VDDX Always on

Up Background debug

PAD[31:16] AN[31:16]

â

â

â

VDDA PER0AD1 Disabled Port AD inputs of ATD1,

PER1AD1

analog inputs of ATD1

PAD[15:0] AN[15:0]

â

â

â

VDDA PER0AD0 Disabled Port AD inputs of ATD0,

PER1AD0

analog inputs of ATD0

PA[7:0] ADDR[15:8] IVD[15:8]

â

â

VDDX

PUCR Disabled Port A I/O, address bus,

internal visibility data

PB[7:1] ADDR[7:1] IVD[7:0]

â

â

VDDX

PUCR Disabled Port B I/O, address bus,

internal visibility data

PB0

ADDR0

UDS

VDDX

PUCR

Disabled Port B I/O, address bus,

upper data strobe

PC[7:0] DATA[15:8]

â

â

PD[7:0] DATA[7:0]

â

â

PE7

ECLKX2 XCLKS

â

â

VDDX

PUCR Disabled Port C I/O, data bus

â

VDDX

PUCR Disabled Port D I/O, data bus

â

VDDX

PUCR

Up Port E I/O, system clock

output, clock select

PE6

TAGHI

MODB

â

â

VDDX

While RESET

Port E I/O, tag high, mode

pin is low: down input

PE5

RE

MODA TAGLO

â

VDDX

While RESET

Port E I/O, read enable,

pin is low: down mode input, tag low input

PE4

ECLK

â

â

â

VDDX

PUCR

PE3

LSTRB

LDS EROMCTL

â

VDDX

PUCR

Up Port E I/O, bus clock output

Up Port E I/O, low byte data

strobe, EROMON control

PE2

R/W

WE

â

PE1

IRQ

â

â

â

VDDX

PUCR

â

VDDX

PUCR

Up Port E I/O, read/write

Up Port E Input, maskable

interrupt

PE0

XIRQ

â

â

â

VDDX

PUCR

Up Port E input, non-maskable

interrupt

PF7

TXD3

â

â

â

VDDX

PERF/

Up Port F I/O, interrupt, TXD of

PPSF

SCI3

PF6

RXD3

â

â

â

VDDX

PERF/

Up Port F I/O, interrupt, RXD of

PPSF

SCI3

PF5

SCL0

â

â

â

VDDX

PERF/

Up Port F I/O, interrupt, SCL of

PPSF

IIC0

PF4

SDA0

â

â

â

VDDX

PERF/

Up Port F I/O, interrupt, SDA of

PPSF

IIC0

PF3

CS3

â

â

â

VDDX

PERF/

Up Port F I/O, interrupt, chip

PPSF

select 3

MC9S12XE-Family Reference Manual Rev. 1.25

58

Freescale Semiconductor

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