S912XEG384J3VA Datasheet, PDF (180/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 2 Port Integration Module (S12XEPIMV1)
PTI
0
1
PT
0
1
PIN
DDR
0
1
data out
Module _{output enable}
module enable
Figure 2-107. Illustration of I/O pin functionality
2.4.2.4 Reduced drive register (RDRx)
If the pin is used as an output this register allows the configuration of the drive strength.
2.4.2.5 Pull device enable register (PERx)
This register turns on a pull-up or pull-down device.
It becomes active only if the pin is used as an input or as a wired-or output.
2.4.2.6 Polarity select register (PPSx)
This register selects either a pull-up or pull-down device if enabled.
It becomes only active if the pin is used as an input. A pull-up device can be activated if the pin is used as
a wired-or output.
2.4.2.7 Wired-or mode register (WOMx)
If the pin is used as an output this register turns off the active high drive. This allows wired-or type
connections of outputs.
2.4.2.8 Interrupt enable register (PIEx)
If the pin is used as an interrupt input this register serves as a mask to the interrupt flag to enable/disable
the interrupt.
MC9S12XE-Family Reference Manual Rev. 1.25
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