S912XEG384J3VA Datasheet, PDF (627/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
Module Base + 0x000E
Access: User read/write⁽¹⁾
7
R RXERR7
6
RXERR6
5
RXERR5
4
RXERR4
3
RXERR3
2
RXERR2
1
RXERR1
0
RXERR0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 16-18. MSCAN Receive Error Counter (CANRXERR)
1. Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Write: Unimplemented
NOTE
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
16.3.2.16 MSCAN Transmit Error Counter (CANTXERR)
This register reflects the status of the MSCAN transmit error counter.
Module Base + 0x000F
Access: User read/write⁽¹⁾
7
R TXERR7
6
TXERR6
5
TXERR5
4
TXERR4
3
TXERR3
2
TXERR2
1
TXERR1
0
TXERR0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 16-19. MSCAN Transmit Error Counter (CANTXERR)
1. Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Write: Unimplemented
NOTE
Reading this register when in any other mode other than sleep or
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
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