S912XEG384J3VA Datasheet, PDF (686/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
Table 18-9. PITLD0–3 Field Descriptions
Field
Description
15:0
PLD[15:0]
PIT Load Bits 15:0 — These bits set the 16-bit modulus down-counter load value. Writing a new value into the
PITLD register must be a 16-bit access, to ensure data consistency. It will not restart the timer. When the timer
has counted down to zero the PTF time-out flag will be set and the register value will be loaded. The PFLT bits
in the PITFLT register can be used to immediately update the count register with the new value if an immediate
load is desired.
18.3.0.9 PIT Count Register 0 to 3 (PITCNT0–3)
Module Base + 0x000A, 0x000B
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R _{PCNT PCNT PCNT PCNT PCNT PCNT PCN PCN PCN PCN PCN PCN PCN PCN PCN PCN}
W ¹⁵
14
13
12
11
10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0
Reset 0
0
0
0
0
0
0000000000
Figure 18-15. PIT Count Register 0 (PITCNT0)
Module Base + 0x000E, 0x000F
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R _{PCNT PCNT PCNT PCNT PCNT PCNT PCN PCN PCN PCN PCN PCN PCN PCN PCN PCN}
W ¹⁵
14
13
12
11
10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0
Reset 0
0
0
0
0
0
0000000000
Figure 18-16. PIT Count Register 1 (PITCNT1)
Module Base + 0x0012, 0x0013
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R _{PCNT PCNT PCNT PCNT PCNT PCNT PCN PCN PCN PCN PCN PCN PCN PCN PCN PCN}
W ¹⁵
14
13
12
11
10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0
Reset 0
0
0
0
0
0
0000000000
Figure 18-17. PIT Count Register 2 (PITCNT2)
Module Base + 0x0016, 0x0017
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R _{PCNT PCNT PCNT PCNT PCNT PCNT PCN PCN PCN PCN PCN PCN PCN PCN PCN PCN}
W ¹⁵
14
13
12
11
10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0
Reset 0
0
0
0
0
0
0000000000
Figure 18-18. PIT Count Register 3 (PITCNT3)
Read: Anytime
Write: Has no meaning or effect
MC9S12XE-Family Reference Manual Rev. 1.25
686
Freescale Semiconductor