S912XEG384J3VA Datasheet, PDF (324/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 8 S12X Debug (S12XDBGV3) Module
8.3.2.8.3 Debug Comparator Address Mid Register (DBGXAM)
Address: 0x002A
R
W
Reset
7
Bit 15
0
6
Bit 14
0
5
Bit 13
0
4
Bit 12
0
3
Bit 11
0
2
Bit 10
0
1
Bit 9
0
0
Bit 8
0
Figure 8-16. Debug Comparator Address Mid Register (DBGXAM)
Read: Anytime. See Table 8-29 for visible register encoding.
Write: If DBG not armed. See Table 8-29 for visible register encoding.
Table 8-33. DBGXAM Field Descriptions
Field
7–0
Bit[15:8]
Description
Comparator Address Mid Compare Bits— The Comparator address mid compare bits control whether the
selected comparator will compare the address bus bits [15:8] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
8.3.2.8.4 Debug Comparator Address Low Register (DBGXAL)
Address: 0x002B
R
W
Reset
7
Bit 7
0
6
Bit 6
0
5
Bit 5
0
4
Bit 4
0
3
Bit 3
0
2
Bit 2
0
1
Bit 1
0
0
Bit 0
0
Figure 8-17. Debug Comparator Address Low Register (DBGXAL)
Read: Anytime. See Table 8-29 for visible register encoding.
Write: If DBG not armed. See Table 8-29 for visible register encoding.
Table 8-34. DBGXAL Field Descriptions
Field
7–0
Bits[7:0]
Description
Comparator Address Low Compare Bits — The Comparator address low compare bits control whether the
selected comparator will compare the address bus bits [7:0] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
MC9S12XE-Family Reference Manual Rev. 1.25
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