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S912XEG384J3VA Datasheet, PDF (666/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family | |||
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Chapter 17 Periodic Interrupt Timer (S12PIT24B8CV2)
Table 17-5. PITMUX Field Descriptions
Field
Description
7:0
PMUX[7:0]
PIT Multiplex Bits for Timer Channel 7:0 â These bits select if the corresponding 16-bit timer is connected to
micro time base 1 or 0. If PMUX is modiï¬ed, the corresponding 16-bit timer is immediately switched to the other
micro time base.
0 The corresponding 16-bit timer counts with micro time base 0.
1 The corresponding 16-bit timer counts with micro time base 1.
17.3.0.5 PIT Interrupt Enable Register (PITINTE)
Module Base + 0x0004
R
W
Reset
7
PINTE7
0
6
PINTE6
5
PINTE5
4
PINTE4
3
PINTE3
2
PINTE2
0
0
0
0
0
Figure 17-7. PIT Interrupt Enable Register (PITINTE)
1
PINTE1
0
0
PINTE0
0
Read: Anytime
Write: Anytime
Table 17-6. PITINTE Field Descriptions
Field
Description
7:0
PINTE[7:0]
PIT Time-out Interrupt Enable Bits for Timer Channel 7:0 â These bits enable an interrupt service request
whenever the time-out ï¬ag PTF of the corresponding PIT channel is set. When an interrupt is pending (PTF set)
enabling the interrupt will immediately cause an interrupt. To avoid this, the corresponding PTF ï¬ag has to be
cleared ï¬rst.
0 Interrupt of the corresponding PIT channel is disabled.
1 Interrupt of the corresponding PIT channel is enabled.
17.3.0.6 PIT Time-Out Flag Register (PITTF)
Module Base + 0x0005
R
W
Reset
7
PTF7
0
6
PTF6
5
PTF5
4
PTF4
3
PTF3
2
PTF2
0
0
0
0
0
Figure 17-8. PIT Time-Out Flag Register (PITTF)
Read: Anytime
Write: Anytime (write to clear)
1
PTF1
0
0
PTF0
0
MC9S12XE-Family Reference Manual Rev. 1.25
666
Freescale Semiconductor
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