HD6473847RHV Datasheet, PDF (93/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 2 CPU
2.7.2 On-Chip Peripheral Modules
On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits,
so access is by byte size only. This means that for accessing word data, two instructions must be
used. For details on the data bus width and number of access states of each register, refer to
section 16.1, Register Addresses (Address Order).
Two-State Access to On-Chip Peripheral Modules:
Figure 2.13 shows the operation timing in the case of two-state access to an on-chip peripheral
module.
φ or φ _SUB
Internal address bus
Bus cycle
T₁ state
T₂ state
Address
Internal read signal
Internal data bus
(read access)
Read data
Internal write signal
Internal data bus
(write access)
Write data
Figure 2.13 On-Chip Peripheral Module Access Cycle (2-State Access)
Rev. 7.00 Mar. 08, 2010 Page 61 of 510
REJ09B0024-0700