HD6473847RHV Datasheet, PDF (261/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Read upper byte
CPU
[H'AA]
Bus interface
Section 9 Timers
Module data bus
TEMP
[H'FF]
Read lower byte
CPU
[H'FF]
Bus interface
TCFH
[H'AA]
TCFL
[H'FF]
Module data bus
TEMP
[H'FF]
TCFH
[AB] *
TCFL
[00] *
Note: ∗ H'AB00 if counter has been updated once.
Figure 9.4 Read Access to TCF (TCF → CPU)
9.3.5 Operation
The timer F is a 16-bit counter that increments on each input clock pulse. The timer F value is
constantly compared with the value set in the output compare register F, and the counter can be
cleared, an interrupt requested, or port output toggled, when the two values match. The timer F can
also function as two independent 8-bit timers.
Timer F Operation: The timer F has two operating modes, 16-bit timer mode and 8-bit timer
mode. The operation in each of these modes is described below.
Rev. 7.00 Mar. 08, 2010 Page 229 of 510
REJ09B0024-0700