HD6473847RHV Datasheet, PDF (88/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 2 CPU
2.6.2 Effective Address Calculation
Table 2.12 shows how effective addresses are calculated in each of the addressing modes.
Arithmetic and logic instructions use register direct addressing (1). The ADD.B, ADDX, SUBX,
CMP.B, AND, OR, and XOR instructions can also use immediate addressing (6).
Data transfer instructions can use all addressing modes except program-counter relative (7) and
memory indirect (8).
Bit manipulation instructions can use register direct (1), register indirect (2), or 8-bit absolute
addressing (5) to specify the operand. Register indirect (1) (BSET, BCLR, BNOT, and BTST
instructions) or 3-bit immediate addressing (6) can be used independently to specify a bit position
in the operand.
Rev. 7.00 Mar. 08, 2010 Page 56 of 510
REJ09B0024-0700