HD6473847RHV Datasheet, PDF (308/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 10 Serial Communication Interface 3 (SCI3)
Table 10.6 Relation between n and Clock
SMR Setting
n
Clock
CKS1
CKS0
0
φ
0
0
0
φ_W/2^*1/φ_W^*2
0
1
2
φ/16
1
0
3
φ/64
1
1
Notes: 1. φ_W/2 clock in active (medium-speed/high-speed) mode and sleep (medium-speed/high-
speed) mode
2. φ_W clock in subactive mode and subsleep mode
In subactive or subsleep mode, the SCI3 can be operated when CPU clock is φ_W/2 only.
10.3.9 Serial Port Control Register (SPCR)
SPCR selects whether input/output data of the RXD32 and TXD32 pins is inverted or not.
Initial
Bit
Bit Name Value R/W Description
7, 6 ⎯
All 1
⎯
Reserved
These bits are always read as 1 and cannot be modified.
5
SPC32 0
R/W P42/TXD32 Pin Function Switch
This bit selects whether pin P42/TXD32 is used as P42 or
as TXD32.
0: P42 I/O pin
1: TXD32 output pin*
Note: * Set the TE bit in SCR3 after setting this bit to 1.
4
⎯
⎯
W
Reserved
The write value should always be 0.
3
SCINV3 0
R/W TXD32 Pin Output Data Inversion Switch
This bit selects whether or not the logic level of the
TXD32 pin output data is inverted.
0: TXD32 output data is not inverted
1: TXD32 output data is inverted
Rev. 7.00 Mar. 08, 2010 Page 276 of 510
REJ09B0024-0700