HD6473847RHV Datasheet, PDF (532/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Item
Page
1.3 Pin Arrangement 7
Figure 1.4 Pin
Arrangement of
H8/3802, H8/38004 and
H8/38002S Group
(FP-64A, FP-64E, FP-
64K, TNP-64B)
Revisions (See Manual for Details)
Figure title and Figure amended
P90/PWM1 49
P91/PWM2 50
P92 51
P93 52
P94 53
P95 54
Vss 55
IRQAEC 56
P40/SCK32 57
P41/RXD32 58
P42/TXD32 59
P43/IRQ0 60
AVcc 61
PB0/AN0 62
PB1/AN1 63
PB2/AN2 64
FP-64A, FP-64E, FP-64K, TNP-64B
(Top view)
32 P70/SEG17
31 P71/SEG18
30 P72/SEG19
29 P73/SEG20
28 P74/SEG21
27 P75/SEG22
26 P76/SEG23
25 P77/SEG24
24 P80/SEG25
23 PA0/COM1
22 PA1/COM2
21 PA2/COM3
20 PA3/COM4
19 V3
18 V2
17 V1
1.4 Pin Functions
Table 1.4 Pin
Functions
19 to 22
Table amended
Type
Pin No.
Symbol
FP-64A,
FP-64E,
FP-64K,
TNP-64B
DP-64S
Pad Pad
No.*¹*³ No.*² I/O
Functions
2.5.5 Bit Manipulation 46
Instructions
Table 2.7 Bit
Manipulation
Instructions (1)
Table amended
Instruction Size*
BAND
B
BIAND
B
BOR
B
BIOR
B
Function
C ∧ (<bit-No.> of <EAd>) → C
ANDs the carry flag with a specified bit in a general register or memory
operand and stores the result in the carry flag.
C ∧ [¬ (<bit-No.> of <EAd>)] → C
ANDs the carry flag with the inverse of a specified bit in a general
register or memory operand and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
C ∨ (<bit-No.> of <EAd>) → C
ORs the carry flag with a specified bit in a general register or memory
operand and stores the result in the carry flag.
C ∨ [¬ (<bit-No.> of <EAd>)] → C
ORs the carry flag with the inverse of a specified bit in a general register
or memory operand and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
Rev. 7.00 Mar. 08, 2010 Page 500 of 510
REJ09B0024-0700