HD6473847RHV Datasheet, PDF (159/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 5 Power-Down Modes
• Direct transfer from subactive mode to active (medium-speed) mode
When a SLEEP instruction is executed in subactive mode while the SSBY bit in SYSCR1 is
set to 1, the LSON bit in SYSCR1 is cleared to 0, the MSON bit in SYSCR2 is set to 1, the
DTON bit in SYSCR2 is set to 1, and the TMA3 bit in TMA is set to 1, a transition is made di-
rectly to active (medium-speed) mode via watch mode after the waiting time set in bits STS2
to STS0 in SYSCR1 has elapsed.
5.3.1 Direct Transition from Active (High-Speed) Mode to Active (Medium-Speed) Mode
The time from the start of SLEEP instruction execution to the end of interrupt exception handling
(the direct transition time) is calculated by equation (1).
Direct transition time = {(Number of SLEEP instruction execution states) + (Number of internal
processing states)} × (tcyc before transition) + (Number of interrupt ex-
ception handling execution states) × (tcyc after transition)
…………………(1)
Example:
Direct transition time = (2 + 1) × 2tosc + 14 × 16tosc = 230tosc (when φ/8 is se-
lected as the CPU operating clock)
Legend:
tosc: OSC clock cycle time
tcyc: System clock (φ) cycle time
Rev. 7.00 Mar. 08, 2010 Page 127 of 510
REJ09B0024-0700