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HD6473847RHV Datasheet, PDF (139/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series
Section 4 Clock Pulse Generators
Oscillation waveform
(OSC2)
System clock
(φ)
Oscillation stabilization time
Standby time
Standby mode,
Operating mode watch mode,
or subactive mode
Oscillation stabilization standby time
Active (high-speed) mode
or
active (medium-speed) mode
Interrupt accepted
Figure 4.16 Oscillation Stabilization Standby Time
When standby mode, watch mode, or subactive mode is cleared by an interrupt or reset, and a
transition is made to active (high-speed/medium-speed) mode, the oscillation waveform begins to
change at the point at which the interrupt is accepted. Therefore, when a resonator is connected in
standby mode, watch mode, or subactive mode, since the system clock oscillator is halted, the time
from the point at which this oscillation waveform starts to change until the amplitude of the
oscillation waveform increases and the oscillation frequency stabilizes—that is, the oscillation
stabilization time—is required.
The oscillation stabilization time in the case of these state transitions is the same as the oscillation
stabilization time at power-on (the time from the point at which the power supply voltage reaches
the prescribed level until the oscillation stabilizes), specified by "oscillation stabilization time trc "
in the AC characteristics.
Meanwhile, once the system clock has halted, a standby time is necessary in order for the CPU
and peripheral functions to operate normally.
Thus, the time required from interrupt generation until operation of the CPU and peripheral
functions is the sum of the above described oscillation stabilization time and standby time. This
total time is called the oscillation stabilization standby time, and is expressed by equation (1)
below.
Rev. 7.00 Mar. 08, 2010 Page 107 of 510
REJ09B0024-0700