HD6473847RHV Datasheet, PDF (307/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 10 Serial Communication Interface 3 (SCI3)
Table 10.5 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) (2)
φ
Bit Rate
(bit/s)
n
5 MHz
N
Error (%) n
8 MHz
N
Error (%) n
200
———
—
—
—
0
250
———
3
124 0
2
300
———
—
—
—
0
500
———
2
249 0
0
1k
———
2
124 0
0
2.5k
———
2
49
0
0
5k
0
249 0
2
24
0
0
10k
0
124 0
0
199 0
0
25k
0
49 0
0
79
0
0
50k
0
24 0
0
39
0
0
100k
———
0
19
0
0
250k
0
4
0
0
7
0
0
500k
———
0
3
0
0
1M
———
0
1
0
—
Legend:
Blankx: No setting is available.
—:
A setting is available but error occurs.
Note: The value set in BRR is given by the following formula:
10 MHz
N
Error (%)
12499 0
624 0
8332 0
4999 0
2499 0
999 0
499 0
249 0
99
0
49
0
24
0
9
0
4
0
—
—
N=
φ
8 × 2²ⁿ × B
–1
B: Bit rate (bit/s)
N: BRR setting for baud rate generator (0 ≤ N ≤ 255)
φ: Operating frequency (Hz)
n: Baud rate generator input clock number (n = 0, 2, or 3)
(The relation between n and the clock is shown in table 10.6.)
Rev. 7.00 Mar. 08, 2010 Page 275 of 510
REJ09B0024-0700