HD6473847RHV Datasheet, PDF (240/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 8 I/O Ports
8.8.1 Port Data Register A (PDRA)
PDRA is a register that stores data of port A.
Initial
Bit
Bit Name Value R/W Description
7 to 4 ⎯
All 1
⎯
Reserved
The initial value should not be changed.
3
PA3
0
2
PA2
0
1
PA1
0
0
PA0
0
R/W If port A is read while PCRA bits are set to 1, the values
R/W ^{stored in PDRA are read, regardless of the actual pin}
states. If port A is read while PCRA bits are cleared to 0,
R/W _{the pin states are read.}
R/W
8.8.2 Port Control Register A (PCRA)
PCRA controls whether each of the port A pins functions as an input pin or output pin.
Initial
Bit
Bit Name Value R/W Description
7 to 4 ⎯
All 1
⎯
Reserved
The initial value should not be changed.
3
PCRA3 0
2
PCRA2 0
1
PCRA1 0
0
PCRA0 0
W
Setting a PCRA bit to 1 makes the corresponding pin an
W
output pin, while clearing the bit to 0 makes the pin an
input pin. The settings in PCRA and in PDRA are valid
W
only when the corresponding pin is designated in LPCR
W
as a general I/O pin.
PCRA is a write-only register. Bits 3 to 0 are always read
as 1.
Rev. 7.00 Mar. 08, 2010 Page 208 of 510
REJ09B0024-0700