HD6473847RHV Datasheet, PDF (108/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 3 Exception Handling
Table 3.1 Exception Sources and Vector Address
Relative Module Exception Sources
Vector
Number
Vector Address Priority
RES pin
Watchdog timer
Reset
0
H'0000 to H'0001 High
⎯
Reserved for system use
1 to 3
H'0002 to H'0007
External interrupt IRQ0/Low-voltage detect
4
pin/Low-voltage interrupt^*
detect circuit
(LVD)^*
IRQ1
5
IRQAEC
6
H'0008 to H'0009
H'000A to H'000B
H'000C to H'000D
⎯
Reserved for system use
7, 8
H'000E to H'0011
External interrupt
pin
WKP0
WKP1
WKP2
WKP3
WKP4
WKP5
WKP6
WKP7
9
H'0012 to H'0013
⎯
Reserved for system use
10
H'0014 to H'0015
Timer A
Timer A overflow
11
H'0016 to H'0017
Asynchronous
event counter
Asynchronous event counter 12
overflow
H'0018 to H'0019
⎯
Reserved for system use
13
H'001A to H'001B
Timer F
Timer FL compare match
14
Timer FL overflow
H'001C to H'001D
Timer FH compare match
15
Timer FH overflow
H'001E to H'001F
⎯
Reserved for system use
16, 17
H’0020 to H’0023
SCI3
Transmit end
Transmit data empty
Transmit data full
Receive error
18
H'0024 to H'0025
A/D converter
A/D conversion end
19
H'0026 to H'0027
CPU
Direct transition by execution of 20
SLEEP instruction
H'0028 to H'0029
Low
Note: * The low-voltage detection circuit and low-voltage detection interrupt are implemented on
the H8/38104 Group only.
Rev. 7.00 Mar. 08, 2010 Page 76 of 510
REJ09B0024-0700