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| HD6473847RHV Datasheet, PDF (192/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series | |||
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Section 6 ROM
Increment address
Erase start
SWE bit â 1
Wait 1 μs
nâ1
Set EBR
Enable WDT
ESU bit â 1
Wait 100 μs
E bit â 1
Wait 10 ms
E bit â 0
Wait 10 μs
ESU bit â 0
Wait 10 μs
Disable WDT
EV bit â 1
Wait 20 μs
Set block start address as verify address
H'FF dummy write to verify address
Wait 2 μs
Read verify data
No
Verify data = all 1s ?
Yes
No
Last address of block ?
Yes
EV bit â 0
Wait 4 μs
nân+1
EV bit â 0
Wait 4μs
No
All erase block erased ?
Yes
n â¤100 ?
Yes
No
SWE bit â 0
Wait 100 μs
End of erasing
SWE bit â 0
Wait 100 μs
Erase failure
Figure 6.11 Erase/Erase-Verify Flowchart
Rev. 7.00 Mar. 08, 2010 Page 160 of 510
REJ09B0024-0700
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