HD6473847RHV Datasheet, PDF (295/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 10 Serial Communication Interface 3 (SCI3)
10.3.5 Serial Mode Register (SMR)
SMR is used to set the SCI3’s serial transfer format and select the on-chip baud rate generator
clock source. SMR is initialized to H'00 at a reset and in standby, watch, or module standby mode.
Initial
Bit
Bit Name Value R/W Description
7
COM
0
R/W Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
6
CHR
0
R/W Character Length (enabled only in asynchronous mode)
0: Selects 8 or 5 bits as the data length.
1: Selects 7 or 5 bits as the data length.
When 7-bit data is selected, the MSB (bit 7) in TDR is not
transmitted. To select 5 bits as the data length, set 1 to
both the PE and MP bits. The three most significant bits
(bits 7, 6, and 5) in TDR are not transmitted. In clocked
synchronous mode, the data length is fixed to 8 bits
regardless of the CHR bit setting.
5
PE
0
R/W Parity Enable (enabled only in asynchronous mode)
When this bit is set to 1, the parity bit is added to transmit
data before transmission, and the parity bit is checked in
reception. In clocked synchronous mode, parity bit
addition and checking is not performed regardless of the
PE bit setting.
Rev. 7.00 Mar. 08, 2010 Page 263 of 510
REJ09B0024-0700