HD6473847RHV Datasheet, PDF (268/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 9 Timers
9.4 Asynchronous Event Counter (AEC)
The asynchronous event counter is incremented by external event clock or internal clock input.
Figure 9.7 shows a block diagram of the asynchronous event counter.
9.4.1 Features
• Can count asynchronous events
Can count external events input asynchronously without regard to the operation of system
clocks
φ
and
φ
SUB
• Can be used as two-channel independent 8-bit event counter or single-channel independent 16-
bit event counter.
• Event/clock input is enabled only when IRQAEC is high or event counter PWM output
(IECPWM) is high.
• Both edge sensing can be used for IRQAEC or event counter PWM output (IECPWM)
interrupts. When the asynchronous counter is not used, they can be used as independent
interrupts.
• When an event counter PWM is used, event clock input enabling/disabling can be controlled
automatically in a fixed cycle.
• External event input or a prescaler output clock can be selected by software for the ECH and
ECL clock sources. φ/2, φ/4, or φ/8 can be selected as the prescaler output clock.
• Both edge counting is possible for AEVL and AEVH.
• Counter resetting and halting of the count-up function can be controlled by software
• Automatic interrupt generation on detection of an event counter overflow
• Use of module standby mode enables this module to be placed in standby mode independently
when not used. (For details, refer to section 5.4, Module Standby Function.)
Rev. 7.00 Mar. 08, 2010 Page 236 of 510
REJ09B0024-0700