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HD6473847RHV Datasheet, PDF (262/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series
Section 9 Timers
• Operation in 16-bit timer mode
When CKSH2 is cleared to 0 in timer control register F (TCRF), timer F operates as a 16-bit
timer.
The timer F operating clock can be selected from three internal clocks output by prescaler S by
means of bits CKSL2 to CKSL0 in TCRF.
OCRF contents are constantly compared with TCF, and when both values match, CMFH is set
to 1 in TCSRF. If IENTFH in IENR2 is 1 at this time, an interrupt request is sent to the CPU,
and at the same time, TMOFH pin output is toggled. If CCLRH in TCSRF is 1, TCF is cleared.
TMOFH pin output can also be set by TOLH in TCRF.
When TCF overflows from H'FFFF to H'0000, OVFH is set to 1 in TCSRF. If OVIEH in
TCSRF and IENTFH in IENR2 are both 1, an interrupt request is sent to the CPU.
• Operation in 8-bit timer mode
When CKSH2 is set to 1 in TCRF, TCF operates as two independent 8-bit timers, TCFH and
TCFL. The TCFH/TCFL input clock is selected by CKSH2 to CKSH0/CKSL2 to CKSL0 in
TCRF.
When the OCRFH/OCRFL and TCFH/TCFL values match, CMFH/CMFL is set to 1 in
TCSRF. If IENTFH/IENTFL in IENR2 is 1, an interrupt request is sent to the CPU, and at the
same time, TMOFH pin/TMOFL pin output is toggled. If CCLRH/CCLRL in TCSRF is 1,
TCFH/TCFL is cleared. TMOFH pin/TMOFL pin output can also be set by TOLH/TOLL in
TCRF.
When TCFH/TCFL overflows from H'FF to H'00, OVFH/OVFL is set to 1 in TCSRF. If
OVIEH/OVIEL in TCSRF and IENTFH/IENTFL in IENR2 are both 1, an interrupt request is
sent to the CPU.
TCF Increment Timing: TCF is incremented by clock input (internal clock input). Bits CKSH2
to CKSH0 or CKSL2 to CKSL0 in TCRF select one of four internal clock sources (φ/32, φ/16,
φ/4, or φW/4) created by dividing the system clock (φ or φW).
TMOFH/TMOFL Output Timing: In TMOFH/TMOFL output, the value set in TOLH/TOLL in
TCRF is output. The output is toggled by the occurrence of a compare match.
Figure 9.5 shows the output timing.
Rev. 7.00 Mar. 08, 2010 Page 230 of 510
REJ09B0024-0700