HD6473847RHV Datasheet, PDF (110/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 3 Exception Handling
3.2.2 Interrupt Enable Register 1 (IENR1)
IENR1 enables timers and external pin interrupts.
Initial
Bit
Bit Name Value R/W Description
7
IENTA 0
R/W Timer A interrupt enable
Enables or disables timer A overflow interrupt requests.
0: Disables timer A interrupt requests
1: Enables timer A interrupt requests
6
⎯
⎯
W
Reserved
The write value should always be 0.
5
IENWP 0
R/W Wakeup Interrupt Enable
Enables or disables WKP7 to WKP0 interrupt requests.
0: Disables WKP7 to WKP0 interrupt requests
1: Enables WKP7 to WKP0 interrupt requests
4, 3 ⎯
⎯
W
Reserved
The write value should always be 0.
2
IENEC2 0
R/W IRQAEC Interrupt Enable
Enables or disables IRQAEC interrupt requests.
0: Disables IRQAEC interrupt requests
1: Enables IRQAEC interrupt requests
1
IEN1
0
R/W IRQ1 and IRQ0 Interrupt Enable
0
IEN0
0
R/W Enables or disables IRQ1 and IRQ0 interrupt requests.
0: Disables IRQn interrupt requests
1: Enables IRQn interrupt requests
(n = 1, 0)
Rev. 7.00 Mar. 08, 2010 Page 78 of 510
REJ09B0024-0700