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HD6473847RHV Datasheet, PDF (200/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series
Section 6 ROM
A15 to A0
Memory read mode
Address stable
Other mode command write
tnxtc
tces
tceh
I/O7 to I/O0
tf
twep
tr
tds
tdh
Note: Do not enable and at the same time.
Figure 6.14 Timing Waveforms in Transition from Memory Read Mode to Another Mode
Table 6.14 AC Characteristics in Memory Read Mode
(Conditions: VCC = 3.3 V ±0.3 V, VSS = 0 V, Ta = 25°C ±5°C)
Item
Symbol Min
Access time
tacc
—
CE output delay time
tce
—
OE output delay time
toe
—
Output disable delay time tdf
—
Data output hold time
toh
5
Max
20
150
150
100
—
Unit
µs
ns
ns
ns
ns
Test Condition
Figures 6.15 and 6.16
A15 to A0
Address stable
Address stable
tacc
tacc
toh
toh
I/O7 to I/O0
Figure 6.15 Timing Waveforms in CE and OE Enable State Read
Rev. 7.00 Mar. 08, 2010 Page 168 of 510
REJ09B0024-0700