HD6473847RHV Datasheet, PDF (77/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 2 CPU
Figure 2.7 shows the instruction formats of arithmetic, logic, and shift instructions.
15
87
op
rm
15
87
op
15
87
op
rm
0
ADD, SUB, CMP,
rn
ADDX, SUBX (Rm)
0
ADDS, SUBS, INC, DEC,
rn
DAA, DAS, NEG, NOT
0
rn
MULXU, DIVXU
15
op
15
op
87
rn
87
rm
IMM
0
ADD, ADDX, SUBX,
CMP (#xx:8)
0
rn
AND, OR, XOR (Rm)
15
op
87
rn
IMM
0
AND, OR, XOR (#xx:8)
15
87
op
0
SHAL, SHAR, SHLL, SHLR,
rn
ROTL, ROTR, ROTXL, ROTXR
Legend:
op: Operation field
rm, rn: Register field
IMM: Immediate data
Figure 2.7 Instruction Formats of Arithmetic, Logic, and Shift Instructions
Rev. 7.00 Mar. 08, 2010 Page 45 of 510
REJ09B0024-0700