HD6473847RHV Datasheet, PDF (72/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 2 CPU
Table 2.2 Operation Notation
Symbol
Rd
Rs
Rn
(EAd), <Ead>
(EAs), <Eas>
CCR
N
Z
V
C
PC
SP
#IMM
disp
+
–
×
÷
∧
∨
⊕
→
¬
:3/:8/:16
( ), < >
Description
General register (destination)
General register (source)
General register
Destination operand
Source operand
Condition code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Program counter
Stack pointer
Immediate data
Displacement
Addition
Subtraction
Multiplication
Division
Logical AND
Logical OR
Logical XOR
Move
NOT (logical complement)
3-, 8-, or 16-bit length
Contents of operand indicated by effective address
Rev. 7.00 Mar. 08, 2010 Page 40 of 510
REJ09B0024-0700