HD6473847RHV Datasheet, PDF (381/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38104 Group Only)
14.2.2 Low-Voltage Detection Status Register (LVDSR)
LVDSR is used to control external input selection, indicates when the reference voltage is stable,
and indicates if the power supply voltage goes below or above a specified range.
Initial
Bit
Bit Name Value R/W Description
7
OVF
0^*
R/W LVD Reference Voltage Stabilized Flag
Setting condition:
When the low-voltage detection counter (LVDCNT)
overflows
Clearing condition:
When 0 is written after reading 1
6 to 4 ⎯
All 0
R/W These are read/write enabled reserved bits.
3
VREFSEL 0
R/W Reference Voltage External Input Select
0: The on-chip circuit is used to generate the reference
voltage
1: The reference voltage is input to the Vref pin from an
external source
2
⎯
0
R/W This bit is reserved. It is always read as 0 and cannot be
written to.
1
LVDDF 0^*
R/W LVD Power Supply Voltage Drop Flag
Setting condition:
When the power supply voltage drops below Vint(D)
Clearing condition:
When 0 is written after reading 1
0
LVDUF 0^*
R/W LVD Power Supply Voltage Rise Flag
Setting condition:
When the power supply voltage drops below Vint(D) while
the LVDUE bit in LVDCR is set to 1, and it rises above
Vint(U) before dropping below Vreset1
Clearing condition:
When 0 is written after reading 1
Note: * These bits are initialized by resets trigged by LVDR.
Rev. 7.00 Mar. 08, 2010 Page 349 of 510
REJ09B0024-0700