HD6473847RHV Datasheet, PDF (127/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 4 Clock Pulse Generators
4.2 Register Description
Oscillator Control Register (OSCCR) (H8/38104 Group Only)
OSCCR contains a flag indicating the selection status of the system clock oscillator and on-chip
oscillator, indicates the input level of the IRQAEC pin during resets, and controls whether the
subclock oscillator operates or not.
Initial
Bit
Bit Name Value R/W Description
7
SUBSTP 0
R/W Subclock oscillator stop control
0: Subclock oscillator operates
1: Subclock oscillator stopped
Note:
Bit 7 can be set to 1 only in the active mode (high-
speed/medium-speed). Setting bit 7 to 1 in the
subactive mode will cause the LSI to stop
operating.
6
⎯
0
R
Reserved
This bit is always read as 0
5 to 3 ⎯
All 0
R/W Reserved
These bits are read/write enabled reserved bits.
2
IRQAECF ⎯
R
IRQAEC flag
This bit indicates the IRQAEC pin input level set during
resets.
0: IRQAEC pin set to GND during resets
1
OSCF
⎯
1: IRQAEC pin set to V_CC during resets
R
OSC flag
This bit indicates the oscillator operating with the system
clock pulse generator.
0: System clock oscillator operating (on-chip oscillator
stopped)
1: On-chip oscillator operating (system clock oscillator
stopped)
0
⎯
0
R/W Reserved
Never write 1 to this bit, as it can cause the LSI to
malfunction.
Rev. 7.00 Mar. 08, 2010 Page 95 of 510
REJ09B0024-0700