HD6473847RHV Datasheet, PDF (189/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 6 ROM
Write pulse application subroutine
Apply Write Pulse
WDT enable
Set PSU bit in FLMCR1
Wait 50 μs
Set P bit in FLMCR1
Wait (Wait time=programming time)
Clear P bit in FLMCR1
Wait 5 μs
Clear PSU bit in FLMCR1
Wait 5 μs
Disable WDT
End Sub
START
Set SWE bit in FLMCR1
Wait 1 μs
Store 128-byte program data in program
data area and reprogram data area
n←1
m←0
Write 128-byte data in RAM reprogram
data area consecutively to flash memory
Apply Write pulse
Set PV bit in FLMCR1
Wait 4 μs
Set block start address as
verify address
H'FF dummy write to verify address
Wait 2 μs
Increment address
Read verify data
Verify data =
No
write data?
Yes
No
n≤6?
Yes
Additional-programming data computation
m←1
Reprogram data computation
n←n+1
128-byte
No
data verification completed?
Yes
Clear PV bit in FLMCR1
Wait 2 μs
No
n ≤ 6?
Yes
Successively write 128-byte data from additional-
programming data area in RAM to flash memory
Sub-Routine-Call
Apply Write Pulse
No
m= 0 ?
Yes
Clear SWE bit in FLMCR1
Wait 100 μs
End of programming
Yes
n ≤ 1000 ?
No
Clear SWE bit in FLMCR1
Wait 100 μs
Programming failure
Figure 6.10 Program/Program-Verify Flowchart
Rev. 7.00 Mar. 08, 2010 Page 157 of 510
REJ09B0024-0700