HD6473847RHV Datasheet, PDF (71/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 2 CPU
2.5 Instruction Set
The H8/300L CPU can use a total of 55 instructions, which are grouped by function in table 2.1.
Table 2.1 Instruction Set
Function
Instructions
Number
Data transfer
MOV, PUSH^*1, POP^*1
1
Arithmetic operations ADD, SUB, ADDX, SUBX, INC, DEC, ADDS, SUBS, DAA, 14
DAS, MULXU, DIVXU, CMP, NEG
Logic operations
AND, OR, XOR, NOT
4
Shift
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR 8
Bit manipulation
Branch
BSET, BCLR, BNOT, BTST, BAND, BIAND, BOR, BIOR,
14
BXOR, BIXOR, BLD, BILD, BST, BIST
Bcc^*2, JMP, BSR, JSR, RTS
5
System control
RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP
8
Block data transfer EEPMOV
1
Total: 55
Notes: 1. PUSH Rn is equivalent to MOV.W Rn, @–SP.
POP Rn is equivalent to MOV.W @SP+, Rn. The same applies to the machine
language.
2. Bcc is the general name for conditional branch instructions.
Tables 2.3 to 2.10 summarize the instructions in each functional category. The notation used in
tables 2.3 to 2.10 is defined below.
Rev. 7.00 Mar. 08, 2010 Page 39 of 510
REJ09B0024-0700