HD6473847RHV Datasheet, PDF (21/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Figures
Section 1 Overview
Figure 1.1 Internal Block Diagram of H8/3802 Group ............................................................ 4
Figure 1.2 Internal Block Diagram of H8/38004 and H8/38002S Group................................. 5
Figure 1.3 Internal Block Diagram of H8/38104 Group .......................................................... 6
Figure 1.4 Pin Arrangement of H8/3802, H8/38004 and H8/38002S Group
(FP-64A, FP-64E, FP-64K, TNP-64B) ................................................................... 7
Figure 1.5 Pin Arrangement of H8/3802 Group (DP-64S)....................................................... 8
Figure 1.6 Pin Arrangement of H8/38104 Group (FP-64A, FP-64E)....................................... 9
Figure 1.7 Pad Arrangement of HCD6433802, HCD6433801, and HCD6433800
(Top View)............................................................................................................ 10
Figure 1.8 Pad Arrangement of HCD64338004, HCD64338003, HCD64338002,
HCD64338001, and HCD64338000 (Top View).................................................. 13
Figure 1.9 Pad Arrangement of HCD64F38004 and HCD64F38002 (Top View) ................. 16
Section 2 CPU
Figure 2.1(1) H8/3802 Memory Map.......................................................................................... 24
Figure 2.1(2) H8/3801 Memory Map.......................................................................................... 25
Figure 2.1(3) H8/3800 Memory Map.......................................................................................... 26
Figure 2.1(4) H8/38004, H8/38104 Memory Map...................................................................... 27
Figure 2.1(5) H8/38003, H8/38103 Memory Map...................................................................... 28
Figure 2.1(6) H8/38002, H8/38102 Memory Map...................................................................... 29
Figure 2.1(7) H8/38002S Memory Map ..................................................................................... 30
Figure 2.1(8) H8/38001, H8/38001S, H8/38101 Memory Map.................................................. 31
Figure 2.1(9) H8/38000, H8/38000S, H8/38100 Memory Map.................................................. 32
Figure 2.2 CPU Registers ....................................................................................................... 33
Figure 2.3 Stack Pointer ......................................................................................................... 34
Figure 2.4 General Register Data Formats ............................................................................. 37
Figure 2.5 Memory Data Formats .......................................................................................... 38
Figure 2.6 Instruction Formats of Data Transfer Instructions ................................................ 42
Figure 2.7 Instruction Formats of Arithmetic, Logic, and Shift Instructions ......................... 45
Figure 2.8 Instruction Formats of Bit Manipulation Instructions........................................... 48
Figure 2.9 Instruction Formats of Branch Instructions........................................................... 50
Figure 2.10 Instruction Formats of System Control Instructions ............................................. 52
Figure 2.11 Instruction Format of Block Data Transfer Instructions ....................................... 53
Figure 2.12 On-Chip Memory Access Cycle ........................................................................... 60
Figure 2.13 On-Chip Peripheral Module Access Cycle (2-State Access) ................................ 61
Figure 2.14 On-Chip Peripheral Module Access Cycle (3-State Access) ................................ 62
Figure 2.15 CPU Operation States ........................................................................................... 63
Figure 2.16 State Transitions.................................................................................................... 64
Rev. 7.00 Mar. 08, 2010 Page xix of xxx
REJ09B0024-0700